Memoirs of the Faculty of Engineering, Yamaguchi University

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Memoirs of the Faculty of Engineering, Yamaguchi University Volume 51 Issue 1
published_at 2000-10

Extraction of Routing-Trees from Polygon Routing-Patterns in an LSI Layout

LSIレイアウトにおけるポリゴン配線の通常配線変換
Go Tatsuo
Watanabe Takahiro
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A030051000105.pdf
Descriptions
In LSI layout design, two kinds of wire patterns are used to connect equipotential terminals. One is a so-called “ordinary routing-pattern” which is defined by line segments with a given width along a route, and another is a “polygon routing-pattern” whose shape is defined by coordinates of polygon's vertices. The latter is difficult to deal with layout CAD/DA tools like a layout compactor, because direction of wire's expansion and contraction cannot be recognized. So, we propose an algorithm which can efficiently transform a polygon routing-pattern into an ordinary one, by constructing a routing tree connecting terminals in each polygon pattern. Experimental results show that a transformed routing pattern obtained by the proposed algorithm is good for existent CAD tools.
Creator Keywords
LSI
Layout
Compaction
Polygon Routing
Steiner Tree
Maze Method