A method for generating tests in combinational circuits by structure description functions
The transactions of the Institute of Electronics and Communication Engineers of Japan. D Volume 64 Issue 8
Page 690-696
published_at 1981-8
Title
構造記述関数を用いた組合せ回路の故障検査について
A method for generating tests in combinational circuits by structure description functions
Languages
jpn
Resource Type
journal article
Date Issued
1981-8
Rights
copyright(c)1981 IEICE()
File Version
Version of Record
Access Rights
open access
Relations
[ISSN]0374-468X
[NCID]AN00153326
[isVersionOf]
[URI]http://search.ieice.org/index.html
Schools
大学院理工学研究科（工学）